Altera Low Latency Ethernet 10G MAC - Manual (Page 86)

Table 5-3: Error Correction Signals
Signal Direction Width Description
ecc_err_det_corr
Out 1 The MAC IP core can indicate detected and
corrected ECC errors using the
ecc_status
register, or both the register and this signal.
This signal indicates the state of the
ecc_
status[0]
register bit when the
ecc_
enable[0]
register bit is set to 1. This signal
is 0 when the
ecc_enable[0]
register bit is
set to 1.
ecc_err_det_uncorr
Out 1 The MAC IP core can indicate detected and
uncorrected ECC errors using the
ecc_
status
register, or both the register and
this signal.
This signal indicates the state of the
ecc_
status[1]
register bit when the
ecc_
enable[1]
register bit is set to 1. This signal
is 0 when the
ecc_enable[1]
register bit is
set to 1.
Unidirectional Signals
The unidirectional signals are present only when you turn on the Unidirectional feature option.
Table 5-4: Unidirectional Signals
Signal Direction Width Description
unidirectional_en
Out 1
When asserted, this signal indicates the
state of the
tx_unidir_control
register bit
0.
unidirectional_remote_
fault_dis
Out 1
When asserted, this signal indicates the
state of the
tx_unidir_control
register bit
1.
Avalon-MM Programming Signals
The Avalon-MM programming signals apply to all operating modes.
Table 5-5: Avalon-MM Programming Signals
Signal Direction Width Description
csr_address[]
In 10 Use this bus to specify the register address to read
from or write to.
5-4 Unidirectional Signals
UG-01144
2014.12.15
Altera Corporation Interface Signals for LL Ethernet 10G MAC
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