Altera Low Latency Ethernet 10G MAC - Manual (Page 6)

Features
The LL Ethernet 10G MAC supports the following features:
• Full-duplex MAC in four operating modes: 10G, 1G/10G, or 10M/100M/1G/10G).
• Three variations for selected operating modes: MAC Tx only block, MAC Rx only block, and MAC Tx
and MAC Rx block.
• Interfaces:
• Client-side—32-bit Avalon-ST interface.
• PHY-side—32-bit XGMII, 16-bit GMII, or 4-bit MII depending on the operating mode.
• Management—32-bit Avalon-MM interface.
• Virtual local area network (VLAN) and stacked VLAN tagged frames decoding (type 'h8100).
• Cyclic redundancy code (CRC)-32 computation and insertion on the TX datapath. Optional CRC
checking and forwarding on the RX datapath.
• Deficit idle counter (DIC) for optimized performance with average inter-packet gap (IPG) for LAN
applications.
• Optional statistics collection on TX and RX datapaths.
• Programmable maximum length of TX and RX data frames up to 64 Kbytes (KB).
• Programmable promiscuous (transparent) mode.
• Optional padding insertion on the TX datapath and termination on the RX datapath.
• Ethernet flow control using pause frames.
• Optional timestamping feature as specified by IEEE 1588v2 for the following configurations:
• 10GbE MAC with 10GBASE-R PHY IP core
• 1G/10GbE MAC with 1G/10GbE PHY IP core
• 10M/100M/1G/10GbE MAC with 10M-10GbE PHY IP core
• Optional features for 10G operating mode:
• Unidirectional feature as specified by IEEE 802.3 (Clause 66).
• Priority-based flow control (PFC) with programmable pause quanta. PFC supports 2 to 8 priority
queues.
• Preamble passthrough mode on TX and RX datapaths, which allows user-defined preamble in the
client frame. This feature is supported only in the 10G operating mode.
• 10GBASE-R register mode on the TX and RX datapaths, which enables lower latency.
1-2 Features
UG-01144
2014.12.15
Altera Corporation About LL Ethernet 10G MAC
Send Feedback