Altera Low Latency Ethernet 10G MAC - Manual (Page 3)

Length Checking............................................................................................................................ 3-14
CRC and Padding Bytes Removal................................................................................................3-15
Overflow Handling........................................................................................................................ 3-16
RX Timing Diagrams.................................................................................................................... 3-16
Flow Control...............................................................................................................................................3-17
IEEE 802.3 Flow Control.............................................................................................................. 3-17
Priority-Based Flow Control........................................................................................................ 3-19
Reset Requirements................................................................................................................................... 3-20
Supported PHYs.........................................................................................................................................3-21
10GBASE-R Register Mode..........................................................................................................3-22
XGMII Error Handling (Link Fault).......................................................................................................3-23
IEEE 1588v2................................................................................................................................................3-25
Architecture....................................................................................................................................3-25
Transmit Datapath.........................................................................................................................3-26
Receive Datapath............................................................................................................................3-27
Frame Format.................................................................................................................................3-27
Configuration Registers for LL Ethernet 10G MAC.......................................... 4-1
Register Map.................................................................................................................................................4-1
Mapping 10-Gbps Ethernet MAC Registers to LL Ethernet 10G MAC Registers..................4-2
Register Access............................................................................................................................................. 4-4
Primary MAC Address................................................................................................................................4-5
MAC Reset Control Register......................................................................................................................4-5
TX_Configuration and Status Registers................................................................................................... 4-6
Flow Control Registers..............................................................................................................................4-10
Unidirectional Control Registers.............................................................................................................4-12
RX Configuration and Status Registers.................................................................................................. 4-13
TX Timestamp Registers...........................................................................................................................4-18
Calculating TX Timing Adjustments..........................................................................................4-20
RX Timestamp Registers...........................................................................................................................4-21
Calculating RX Timing Adjustments..........................................................................................4-23
ECC Registers.............................................................................................................................................4-24
Statistics Registers......................................................................................................................................4-25
Interface Signals for LL Ethernet 10G MAC.......................................................5-1
Clock and Reset Signals...............................................................................................................................5-1
Speed Selection Signal................................................................................................................................. 5-3
Error Correction Signals............................................................................................................................. 5-3
Unidirectional Signals................................................................................................................................. 5-4
Avalon-MM Programming Signals........................................................................................................... 5-4
Avalon-ST Data Interfaces..........................................................................................................................5-5
Avalon-ST TX Data Interface Signals........................................................................................... 5-5
Avalon-ST RX Data Interface Signals........................................................................................... 5-6
Avalon-ST Flow Control Signals............................................................................................................... 5-7
Avalon-ST Status Interface.........................................................................................................................5-8
Avalon-ST TX Status Signals..........................................................................................................5-8
Avalon-ST RX Status Signals........................................................................................................5-10
Low Latency Ethernet 10G MAC User Guide TOC-3
Altera Corporation