Altera Low Latency Ethernet 10G MAC - Manual (Page 48)

Figure 3-22: Overview of IEEE 1588v2 Feature
IEEE 1588v2
Tx Logic
IEEE 1588v2
Rx Logic
PTP Software
Stack
Time-of-Day
Clock
PHY
Tx
PHY
Rx
10GbE MAC IP 10GBASE-R PHY IP
tx_path_delay
rx_path_delay
Timestamp &
User Fingerprint
Correction
Time of Day
Timestamp Aligned to
Receive Frame
tx_egress_timestamp_request
tx_ingress_timestamp
tx_time_of_day
rx_time_of_day
Transmit Datapath
The IEEE 1588v2 feature supports 1-step and 2-step clock synchronizations on the transmit datapath.
• For 1-step clock synchronization,
• Timestamp insertion depends on the PTP device and message type.
• The MAC function inserts a timestamp in the PTP packet when the client specifies the Timestamp
field offset and asserts Timestamp Insert Request.
• Depending on the PTP device and message type, the MAC function updates the residence time in
the correction field of the PTP packet when the client asserts
tx_etstamp_ins_ctrl_residence_time_update
and Correction Field Update. The residence
time is the difference between the egress and ingress timestamps.
• For PTP packets encapsulated using the UDP/IPv6 protocol, the MAC function performs UDP
checksum correction using extended bytes in the PTP packet.
• The MAC function recomputes and reinserts CRC-32 into the PTP packets after each timestamp or
correction field insertion.
• The format of timestamp supported includes 1588v1 and 1588v2
• For 2-step clock synchronization, the MAC function returns the timestamp and the associated
fingerprint for all transmit frames when the client asserts
tx_egress_timestamp_request_valid
.
The following table summarizes the timestamp and correction field insertions for various PTP messages
in different PTP clocks.
3-26 Transmit Datapath
UG-01144
2014.12.15
Altera Corporation Functional Description of LL Ethernet 10G MAC
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