beautypg.com

Rainbow Electronics DS3131 User Manual

Page 54

background image

DS3131

54 of 174

Repetitive Pattern Length Map

Length Code

Length

Code

Length Code

Length Code

17 Bits

0000

18 Bits

0001

19 Bits

0010

20 Bits

0011

21 Bits

0100

22 Bits

0101

23 Bits

0110

24 Bits

0111

25 Bits

1000

26 Bits

1001

27 Bits

1010

28 Bits

1011

29 Bits

1100

30 Bits

1101

31 Bits

1101

32 Bits

1111


Bit 13/Interrupt Enable for Counter Overflow (IEOF).
Allows the receive BERT to cause an interrupt if either
the bit counter or the error counter overflows.

0 = interrupt masked

1 = interrupt enabled


Bit 14/Interrupt Enable for Bit Error Detected (IEBED).
Allows the receive BERT to cause an interrupt if a bit
error is detected.

0 = interrupt masked

1 = interrupt enabled


Bit 15/Interrupt Enable for Change-of-Synchronization Status (IESYNC).
Allows the receive BERT to cause
an interrupt if there is a change of state in the synchronization status (i.e., the receive BERT either goes into or out
of synchronization).

0 = interrupt masked

1 = interrupt enabled