Rainbow Electronics DS3131 User Manual
Page 146
DS3131
146 of 174
Bit 6/Local Bus Width (LBW)
0 = 16 bits
1 = 8 bits
Bits 8 to 11/Local Bus Arbitration Timer Setting (LAT0 to LAT3). These four bits determine the total time the
local bus seizes the bus when it has been granted in the arbitration mode (LARBE = 1). This period is measured
from LHLDA (LBG) being detected to LBGACK inactive.
CONDITION
33MHz PCLK
25MHz PCLK
0000 = when granted, hold the bus for 32 LCLKs
0.97
µ
s 1.3
µ
s
0001 = when granted, hold the bus for 64 LCLKs
1.9
µ
s 2.6
µ
s
0010 = when granted, hold the bus for 128 LCLKs
3.9
µ
s 5.1
µ
s
0011 = when granted, hold the bus for 256 LCLKs
7.8
µ
s 10.2
µ
s
0100 = when granted, hold the bus for 512 LCLKs
15.5
µ
s 20.5
µ
s
1101 = when granted, hold the bus for 262,144 LCLKs
7.9ms
10.5ms
1110 = when granted, hold the bus for 524,288 LCLKs
15.9ms
21.0ms
1111 = when granted, hold the bus for 1,048,576 LCLKs
31.8ms
41.9ms
Note:
In bridge mode, LCLK is derived from PCLK inside the DS3131. Their periods, therefore, match.