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Bert register description, Hdlc, Figure 8-1. fifo example – Rainbow Electronics DS3131 User Manual

Page 52: 4 bert register description, Figure 6-3. bert register set

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DS3131

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6.4 BERT Register Description

Figure 6-3. BERT Register Set

BERTC0: BERT Control 0

LSB

reserved

TINV

RINV PS2 PS1 PS0 LC

RESYNC

MSB

IESYNC

IEBED IEOF

reserved

RPL3 RPL2 RPL1 RPL0



BERTC1: BERT Control 1

LSB

EIB2 EIB1 EIB0 SBE

reserved

reserved

reserved TC

MSB

Alternating Word Count



BERTRP0: BERT Repetitive Pattern Set 0 (lower word)

LSB

BERT Repetitive Pattern Set (lower byte)

MSB

BERT Repetitive Pattern Set



BERTRP1: BERT Repetitive Pattern Set 1 (upper word)

LSB

BERT Repetitive Pattern Set

MSB

BERT Repetitive Pattern Set (upper byte)



BERTBC0: BERT Bit Counter 0 (lower word)

LSB

BERT 32-Bit Bit Counter (lower byte)

MSB

BERT 32-Bit Bit Counter



BERTBC1: BERT Bit Counter 0 (upper word)

LSB

BERT 32-Bit Bit Counter

MSB

BERT 32-Bit Bit Counter (upper byte)



BERTEC0: BERT Error Counter 0/Status

LSB

reserved RA1 RA0 RLOS BED BBCO BECO SYNC

MSB

BERT 24-Bit Error Counter (lower byte)



BERTEC1: BERT Error Counter 1 (upper word)

LSB

BERT 24-Bit Error Counter

MSB

BERT 24-Bit Error Counter (upper byte)