Port register descriptions, Bert, 2 port register descriptions – Rainbow Electronics DS3131 User Manual
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DS3131
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6.2 Port Register Descriptions
Receive Side Control Bits (one each for all 40 ports)
Register Name:
RP[n]CR, where n = 0 to 39 for each port
Register Description:
Receive Port [n] Control Register
Register Address:
See the Register Map in Section
4
.
Bit
# 7 6 5 4 3 2 1 0
Name
reserved reserved reserved reserved reserved reserved RIDE
RICE
Default
0 0 0 0 0 0 0 0
Bit
# 15 14 13 12 11 10 9 8
Name
reserved reserved reserved reserved LLBB LLBA reserved reserved
Default
0 0 0 0 0 0 0 0
Note:
Bits that are underlined are read-only; all other bits are read-write.
Bit 0/Invert Receive Clock Enable (RICE)
0 = do not invert clock (normal mode)
1 = invert clock (inverted clock mode)
Bit 1/Invert Receive Data Enable (RIDE)
0 = do not invert data (normal mode)
1 = invert data (inverted data mode)
Bit 10/Local Loopback A Enable (LLBA). This loopback routes transmit data back to the receive port close to
the ports pins on the device (
Figure 6-1
).
0 = loopback disabled
1 = loopback enabled
Bit 11/Local Loopback B Enable (LLBB). This loopback route transmits data as it leaves the bit-synchronous
HDLC controller back into the HDLC controller (
Figure 6-1
).
0 = loopback disabled
1 = loopback enabled