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Intel 386 User Manual

Page 684

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Index-5

INDEX

operation,

9-4

9-16

overview,

9-1

programming,

9-15

9-32

considerations,

9-32

ICW1,

9-20

,

D-28

ICW1 register,

9-20

ICW2,

9-21

,

D-29

ICW2 register,

9-21

ICW3,

9-22

,

9-23

,

D-29

,

D-30

ICW3 register,

9-22

,

9-23

ICW4,

9-24

,

D-30

ICW4 register,

9-24

IERn, 11-27, D-32
IIRn, 11-28, D-33
INTCFG,

5-10

,

9-19

,

D-34

INTCFG register,

9-19

OCW1,

9-25

,

D-40

OCW1 register,

9-25

OCW2,

9-26

,

D-41

OCW2 register,

9-26

OCW3,

9-27

,

D-42

OCW3 register,

9-27

P3CFG register,

9-18

POLL,

9-28

,

D-49

POLL register,

9-28

register addresses,

4-16

,

4-17

,

D-2

,

D-3

registers,

9-15

9-17

signals,

9-5

spurious interrupts,

9-30

Interrupt priority,

9-6

9-8

Interrupt service routine,

6-23

Interrupts and exceptions, relative priority,

7-7

J

JTAG reset,

8-12

JTAG test-logic unit,

18-1

18-14

block diagram,

18-2

design considerations,

18-14

operation,

18-3

18-9

boundary-scan register,

18-9

bypass register,

18-8

identification code register,

18-8

instruction register,

18-7

test access port controller,

18-4

18-6

instructions,

18-7

18-8

state diagram,

18-6

overview,

18-1

18-2

Resetting upon power-up,

18-3

testing,

18-10

18-11

bypassing devices on a board,

18-10

disabling the output drivers,

18-11

identifying the device,

18-10

sampling device operation and preloading
data,

18-10

testing the interconnections,

18-10

timing information,

18-12

18-13

L

Literature,

1-8

Literature, ordering,

1-5

,

1-8

LOCK#,

6-34

6-35

lockout sequence,

17-4

M

Manual contents, summary,

1-1

1-2

Measurements, defined,

1-3

Misaligned data transfers,

6-9

Mode,

12-22

N

Naming conventions,

1-3

1-4

Non-page mode,

15-13

Nonspecific EOI command,

9-14

Notational conventions,

1-3

1-4

Numbers, conventions,

1-3

O

Operand alignment

aligned,

6-9

misaligned,

6-9

Operating mode,

9-8

P

Page mode,

15-12

Paging Unit,

3-4

,

3-5

PC/AT Address, defined,

1-4

PC/AT system architecture, departures from,

B-1

Performance,

2-1

Peripherals, internal

configuring,

5-3

5-37

DOS compatible,

4-2

embedded application-specific,

4-2