Figure 143. bus cycle length adjustments for over – Intel 386 User Manual
Page 447
Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
14-12
Figure 14-3. Bus Cycle Length Adjustments for Overlapping Regions
A2392-02
Complete bus cycle.
READY#
asserted?
Yes
No
Is any
channel
dependent on
external
ready?
Wait for largest number of
all overlapping regions'
wait state values.
Wait for smallest number
of all overlapping regions'
wait state values.
No
Yes
Wait
State
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