Intel 386 - Manual (Page 595)

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
D-30
D.26 ICW3 (SLAVE)
D.27 ICW4 (MASTER AND SLAVE)
Initialization Command Word 3
ICW3 (slave)
(write only) Expanded Addr:
ISA Addr:
Reset State: F0A1H
00A1H
XXH
7 0
0 0 0 0 0 0 1 0
Bit
Number
Bit
Mnemonic
Function
7–2 — Clear these bits to guarantee device operation.
1 — Set this bit to guarantee device operation.
0 — Clear this bit to guarantee device operation.
Initialization Command Word 4
ICW4 (master and slave)
(write only)
Expanded Addr:
ISA Addr:
Reset State:
master slave
F021H F0A1H
0021H 00A1H
XXH XXH
7 0
0 0 0 SFNM 0 0 AEOI 1
Bit
Number
Bit
Mnemonic
Function
7–5 — Write zero to these bits to guarantee device operation.
4 SFNM Special-fully Nested Mode:
0 = Selects fully nested mode.
1 = Selects special-fully nested mode. Only the master 82C59A can
operate in special-fully nested mode.
3–2 — Write zero to these bits to guarantee device operation.
1 AEOI Automatic EOI Mode:
0 = Disables automatic EOI mode.
1 = Enables automatic EOI mode. Only the master 82C59A can operate
in automatic EOI mode.
0 — Write one to this bit to guarantee device operation.