D.48 port92 – Intel 386 User Manual
Page 615

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
D-50
D.48 PORT92
Port 92 Configuration
PORT92
(read/write)
Expanded Addr:
ISA Addr:
Reset State:
F092H
0092H
XXXXXX10B
7
0
—
—
—
—
—
—
A20G
CPURST
Bit
Number
Bit
Mnemonic
Function
7–2
—
Reserved. These bits are undefined; for compatibility with future devices,
do not modify these bits.
1
A20G
A20 Grounded:
0 = Clearing this bit forces address line A20 to 0. This bit affects
addresses generated only by the core. Addresses generated by the
DMA and the Refresh Unit are not affected by this bit.
1 = Setting this bit leaves core-generated addresses unmodified.
0
CPURST
CPU Reset:
0 = Clearing this bit performs no operation.
1 = Setting this bit resets the core without resetting the peripherals.
This bit must be cleared before issuing another reset.
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