Intel 386 User Manual

Page 647

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL

E-10

0 0 0 0 1 1 1 1

1 0 1 0 0 0 1 1

mod reg r/m

3/12*

BTC = test bit and complement

0 0 0 0 1 1 1 1

1 0 1 1 1 0 1 0

mod 1 1 1 r/m

immed
8-bit data

6/8*

0 0 0 0 1 1 1 1

1 0 1 1 1 0 1 1

mod reg r/m

6/13*

BTR = test bit and reset

0 0 0 0 1 1 1 1

1 0 1 1 1 0 1 0

mod 1 1 0 r/m

immed
8-bit data

6/8*

0 0 0 0 1 1 1 1

1 0 1 1 0 0 1 1

mod reg r/m

6/13*

BTS = test bit and set

0 0 0 0 1 1 1 1

1 0 1 1 1 0 1 0

mod 1 0 1r/m

immed
8-bit data

6/8*

0 0 0 0 1 1 1 1

1 0 1 0 1 0 1 1

mod reg r/m

6/13*

CONTROL TRANSFER

CALL = Call

direct within segment

1 1 1 0 1 0 0 0

full displacement

7 + m*

9 + m*

reg/memory indirect
within segment

1 1 1 1 1 1 1 1

mod 0 1 0 r/m

7 + m*/

10 + m*

9 + m*/

12 + m*

h, r

direct intersegment

1 0 0 1 1 0 1 0

unsigned full offset, selector

17 + m*

42 + m*

j, k, r

Protected mode only (direct intersegment)

Via call gate to same privilege level

64 + m

h, j, k, r

Via call gate to different privilege level (no parameters)

98 + m

h, j, k, r

Via call gate to different privilege level (x parameters)

106+8x+

h, j, k, r

From 286 task to 286 TSS

285

h, j, k, r

From 286 task to Intel386 SX CPU TSS

310

h, j, k, r

From 286 task to virtual 8086 task (Intel386 SX CPU TSS)

229

h, j, k, r

From Intel386 SX CPU task to 286 TSS

285

h, j, k, r

From Intel386 SX CPU task to Intel386 SX CPU TSS

392

h, j, k, r

From Intel386 SX CPU task to Virtual 8086 task (Intel386 SX CPU TSS)

309

h, j, k, r

indirect intersegment

1 1 1 1 1 1 1 1

mod 0 1 1 r/m

30 + m

46 + m

h, j, k, r

Protected mode only (indirect intersegment)

Via call gate to same privilege level

68 + m

h, j, k, r

Table E-1. Instruction Set Summary (Sheet 9 of 19)

Instruction

Format

Clock Count

Notes

Real

Ad-

dress
Mode

Virtual

8086
Mode

Pro-

tected

Virtual

Ad-

dress
Mode

Real

Ad-

dress
Mode

Virtual

8086
Mode

Pro-

tected

Virtual

Ad-

dress
Mode