Intel 386 - Manual (Page 600)

D-35
SYSTEM REGISTER QUICK REFERENCE
D.32 IR
Instruction Register
IR Reset State
(Using TRST#):
02H
3 0
INST3 INST2 INST1 INST0
Bit
Number
Bit
Mnemonic
Function
3–0 INST3:0 Instruction opcode. At reset (using TRST#, or after 5 TCK cycles with
TMS held low), this field is loaded with 0010, the opcode for the IDCODE
instruction. Instructions are shifted into this field serially through the TDI
pin. (Table 18-4 lists the valid instruction opcodes.)