Intel 386 - Manual (Page 359)

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
12-24
Figure 12-16. Demand Data-transfer Mode with Chaining Buffer-transfer Mode
No new transfer information, so channel
becomes idle.
A2336-02
Yes
Was the
channel set up
for a new
process?
Yes
No
DMA is
programmed
with the new
addresses and
byte count.
Yes
Write new
requester
and target
addresses
and a new
byte count.
Is there
a new process
to set up? Yes
No
DREQ n
active?
Yes
No
No
DREQ n
active?
No
DMA channel
relinquishes
bus control.
Byte
count = FFFFFFH
or EOP#
active?
DMA channel relinquishes bus control.
DMA transfers one byte or word of data
and decrements the byte count.
DMA gains bus control.
After initialization, the DAM channel is
programmed with the requester and target
addresses and a byte count.