Intel 386 - Manual (Page 269)

Intel386™ EX EMBEDDED PROCESSOR USER’S MANUAL
10-26
10.3.3 Writing the Counters
Use the write format of a counter’s Timer n register (TMRn) to specify a counter’s count. The
count must conform to the write selection specified in the control word (least-significant byte
only, most-significant byte only, or least-significant byte followed by the most-significant byte).
You can write a new count to a counter without affecting the counter’s programmed operating
mode. New counts must also conform to the specified write selection.
Figure 10-26. Timer n Register (TMR n – Write Format)
Table 10-5 lists the minimum and maximum initial counts for each mode.
Timer n (Write Format)
TMR n (n = 0–2)
Expanded Addr:
ISA Addr:
Reset State:
F040H, F041H
F042H
0040H, 0041H
0042H
XXH
7 0
CV7 CV6 CV5 CV4 CV3 CV2 CV1 CV0
Bit
Number
Bit
Mnemonic
Function
7–0 CV7:0 Count Value:
Write a count value for the counter to these bits. When writing the
counter’s count value, follow the write selection specified in the counter’s
control word.
Table 10-5. Minimum and Maximum Initial Counts
Mode Minimum Count Maximum Count
0–1 1 0
2–3 2 0
4–5 1 0
NOTE: 0 is equivalent to 2 16 for binary counting and 10 4 for BCD counting.