Intel 386 - Manual (Page 619)

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
D-54
D.52 RFSADD
D.53 RFSBAD
Refresh Address
RFSADD
(read/write) Expanded Addr:
ISA Addr:
Reset State: F4A6H
—
00FFH
15 8
— — RA13 RA12 RA11 RA10 RA9 RA8
7 0
RA7 RA6 RA5 RA4 RA3 RA2 RA1 1
Bit
Number
Bit
Mnemonic
Function
15–14 — Reserved. These bits are undefined; for compatibility with future devices,
do not modify these bits.
13–1 RA13:1 Refresh Address Bits:
These bits comprise A13:1 of the refresh address.
0 — Refresh Bit 0:
A0 of the refresh address. This bit is always 1 and is read-only.
Refresh Base Address
RFSBAD
(read/write) Expanded Addr:
ISA Addr:
Reset State: F4A0H
—
0000H
15 8
— — — — RA25 RA24 RA23 RA22
7 0
RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14
Bit
Number
Bit
Mnemonic
Function
15–12 — Reserved. These bits are undefined; for compatibility with future devices,
do not modify these bits.
11–0 RA25:14 Refresh Base:
These bits make up the A25:14 address bits of the refresh address. This
establishes a memory region for refreshing.