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Preface – Rockwell Automation 1761 MicroLogix 1000 Programmable Controllers User Manual

Page 296

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Preface

MicroLogix 1000 Programmable Controllers User Manual

B–8

Address

Bit

Classification

Description

S:1/14

OEM Lock

Static
Configuration

Using this bit you can control access to a
controller file.

C f

To program this feature, select “Future Access
Disallow”

when saving your program.

When this bit is cleared, it indicates that any
compatible programming device can access
the ladder program (provided that password
conditions are satisfied).

S:1/15

First Pass

Status

Use this bit to initialize your program as the
application requires. When this bit is set by the
controller, it indicates that the first scan of the
user program is in progress (following power
up in the RUN mode or entry into a REM Run
or REM Test mode). The controller clears this
bit following the first scan.

This bit is set during execution of the startup
protection fault routine. Refer to S:1/9 for more
information.

S:2/0

STI Pending

Status

When set, this bit indicates that the STI timer
has timed out and the STI routine is waiting to
be executed. This bit is cleared upon starting
the STI routine, ladder program, exit of the
REM Run or Test mode, or execution of a true
STS instruction.

S:2/1

STI Enabled

Status and
Static
Configuration

This bit may be set or reset using the STS,
STE, or STD instruction. If set, it allows
execution of the STI if the STI setpoint S:30 is
non-zero. If clear, when an interrupt occurs,
the STI subroutine does not execute and the
STI Pending bit is set. The STI Timer
continues to run when this bit is disabled. The
STD instruction clears this bit.

If this bit is set or reset editing the status file
online, the STI is not affected. If this bit is set,
the bit allows execution of the STI. If this bit is
reset editing the status file offline, the bit
disallows execution of the STI.

S:2/2

STI Executing

Status

When set, this bit indicates that the STI timer
has timed out and the STI subroutine is
currently being executed. This bit is cleared
upon completion of the STI routine, ladder
program, or REM Run or Test mode.

S:2/3 to
S:2/4

Reserved

NA

NA