Rockwell Automation 1761 MicroLogix 1000 Programmable Controllers - Manual (Page 239)

Using High-Speed Counter Instructions
12–25
What Happens to the HSC When Going to REM Run
Mode
Once initialized, the HSC instruction retains its previous state when going through a
mode change or power cycle. This means that the HSC Accumulator (C5:0.ACC)
and High Preset values are retained. Outputs under the direct control of the HSC
also retain their previous state. The Low Preset Reached and High Preset Reached
bits (C0/LP and C0/HP) are also retained. They are examined by the HSC
instruction during the high-speed counter’s first true evaluation in the REM Run
mode to differentiate a retentive REM Run mode entry from an external or initial
Accumulator (C5:0.ACC) modification.
At the first true HSL instruction execution after going-to-run, the Low Preset is
initialized to –32,768 and the output mask and high and low output patterns are
initialized to zero. Use the HSL instruction during the first pass to restore any
values necessary for your application.
You can modify the behavior of the high-speed counter at REM Run mode entry by
adjusting the HSC parameters prior to the first true execution of the HSC
instruction. The following example ladder rungs demonstrate different ways to
adjust the HSC parameters.
Programming