Rockwell Automation 1761 MicroLogix 1000 Programmable Controllers - Manual (Page 115)

Using Basic Instructions
6–17
Addressing Examples
•
C5:0/15 or C5:0/CU Count up enable bit
•
C5:0/14 or C5:0/CD Count down enable bit
•
C5:0/13 or C5:0/DN Done bit
•
C5:0/12 or C5:0/OV Overflow bit
•
C5:0/11 or C5:0/UN Underflow bit
•
C5:0/10 or C5:0/UA Update accumulator bit
•
C5:0.1 or C5:0.PRE Preset value of the counter
•
C5:0.2 or C5:0.ACC Accumulator value of the counter
•
C5:0.1/0 or C5:0.PRE/0 Bit 0 of the preset value
•
C5:0.2/0 or C5:0.ACC/0 Bit 0 of the accumulated value
How Counters Work
The figure below demonstrates how a counter works. The count value must remain
in the range of –32,768 to
+
32,767. If the count value goes above
+
32,767 or below
–32,768, a counter status overflow (OV) or underflow (UN) bit is set.
A counter can be reset to zero using the reset (RES) instruction. (See
page 6–20.)
Underflow Overflow
–32,768 +32,767
Count Up
0
Count Down
Counter Accumulator Value
(CTU)
(CTD)
Programming