Programming – Rockwell Automation 1761 MicroLogix 1000 Programmable Controllers User Manual
Page 245
Using High-Speed Counter Instructions
12–31
Rungs 2.0 and 2.2 are required to write several parameters to the high-speed counter
data file area. These two rungs are conditioned by the first pass bit during one scan
when the controller is going from REM program to REM Run mode.
Rung 2:1
This HSC instruction is not placed in the high-speed counter interrupt
subroutine. If this instruction were placed in the interrupt
subroutine, the high-speed counter could never be started or
initialized (because an interrupt must first occur in order to scan the
high-speed counter interrupt subroutine).
| High Speed Counter |
| +HSC––––––––––––––––––––+ |
|––––––––––––––––––––––––––––––––––––––+HIGH SPEED COUNTER +–(CU)–|
| |Type Encoder (Res,Hld)+–(CD) |
| |Counter C5:0+–(DN) |
| |High Preset 1250| |
| |Accum 1| |
| +–––––––––––––––––––––––+ |
Rung 2:2
Forces a high-speed counter low preset interrupt to occur each REM Run
mode entry. An interrupt can only occur on the transition of the
high-speed counter accum to a preset value (accum reset to 1, then 0).
This is done to allow the high-speed counter interrupt subroutine
sequencers to initialize. The order of high-speed counter
initialization is: (1)load high-speed counter parameters (2)execute
HSL instruction (3)execute true HSC instruction (4)(optional) force
high-speed counter interrupt to occur.
| 1’st High Speed Counter |
| Pass |
| S:1 +RAC––––––––––––––––––+ |
|––––] [––––––––––––––––––––––––––––––––––+–+RESET TO ACCUM VALUE +–+–|
| 15 | |Counter C5:0| | |
| | |Source 1| | |
| | | | | |
| | +–––––––––––––––––––––+ | |
| | High Speed | |
| | Counter | |
| | C5:0 | |
| +–––(RES)–––––––––––––––––+ |
Programming