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Rockwell Automation 1761 MicroLogix 1000 Programmable Controllers User Manual

Page 226

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Preface

MicroLogix 1000 Programmable Controllers User Manual

12–12

When the low preset is reached, the:

LP bit is set.

High-speed counter interrupt file (program file 4) is executed if the interrupt is
enabled. The IL bit is set and the IH, IV, and IN bits are reset.

An overflow occurs when the hardware accumulator transitions from

+

32,767 to

–32,768. When an overflow occurs, the:

OV bit is set.

High-speed counter interrupt file (program file 4) is executed if the interrupt is
enabled. The IV bit is set and the IH, IL, and IN bits are reset.

An underflow occurs when the hardware accumulator transitions from –32,768 to

+

32,767. When an underflow occurs, the:

UN bit is set.

High-speed counter interrupt file (program file 4) is executed if the interrupt is
enabled. The IN bit is set and the IH, IL, and IV bits are reset.

The following tables summarize what the input state must be for the corresponding
high-speed counter action to occur:

Bidirectional Counter (Pulse/direction)

Input State

H g -Speed

Input Count

(I/0)

Input

Direction

(I/1)

Input Reset

(I/2)

Input Hold

(I/3)

HSC Rung

High-Speed

Counter Action

Turning
Off-to-On

Off

NA

NA

True

Count Up

Turning
Off-to-On

On

NA

NA

True

Count Down

NA

NA

NA

NA

False

Hold Count

Off, On, or
Turning Off

NA

NA

NA

NA

Hold Count

NA (Not Applicable)