Rainbow Electronics ATmega64M1 - Manual (Page 264)

264
8209A–AVR–08/09
ATmega16M1/32M1/64M1
24.4.7 DIDR1 – Digital Input Disable Register 1
• Bit 5, 2, 1: ACMP0D, ACMP1PD, ACMP3PD:
ACMP0, ACMP1P, ACMP3P Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding analog pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to one of these pins and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit 7 6 5 4 3 2 1 0
- AMP2PD ACMP0D AMP0PD AMP0ND ADC10D
ACMP1D
ADC9D
AMP1PD
ACMP3D
ADC8D
AMP1ND
DIDR1
Read/Write - - R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0