6 register description, 1 lincr – lin control register – Rainbow Electronics ATmega64M1 User Manual
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8209A–AVR–08/09
ATmega16M1/32M1/64M1
10. LINDAT:
- All bits are in R/W accessible,
- Note that LAINC has no more effect on the auto-incrementation and the access to the
full FIFO is done setting LINDX[2..0] of LINSEL.
Note:
When a debugger break occurs, the state machine of the LIN/UART controller is stopped
(included frame time-out) and further communication may be corrupted.
21.6
Register Description
21.6.1
LINCR – LIN Control Register
• Bit 7 - LSWRES: Software Reset
– 0 = No action,
– 1 = Software reset (this bit is self-reset at the end of the reset procedure).
• Bit 6 - LIN13: LIN 1.3 mode
– 0 = LIN 2.1 (default),
– 1 = LIN 1.3.
• Bit 5:4 - LCONF[1:0]: Configuration
The configuration settings for LIN and UART mode are shown in
Note:
1. Default
Note:
1. Default
Bit
7
6
5
4
3
2
1
0
LSWRES
LIN13
LCONF1
LCONF0
LENA
LCMD2
LCMD1
LCMD0
LINCR
Read/Write
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Table 21-5.
LIN Mode Configuration
LCONF[1:0]
Mode
LIN Standard configuration (listen mode “off”, CRC “on” & Frame_Time_Out
“on”
01
No CRC, no Time out (listen mode “off”)
10
No Frame_Time_Out (listen mode “off” & CRC “on”)
11
Listening mode (CRC “on” & Frame_Time_Out “on”)
Table 21-6.
UART Mode Configuration
LCONF[1:0]
Mode
8-bit, no parity (listen mode “off”)
01
8-bit, even parity (listen mode “off”)
10
10 = 8-bit, odd parity (listen mode “off”)
11
Listening mode, 8-bit, no parity