Rainbow Electronics ATmega64M1 - Manual (Page 178)

178
8209A–AVR–08/09
ATmega16M1/32M1/64M1
20.7.1 Prescaler
An 8-bit prescaler is initialized by CANTCON register. It receives the clk
IO
frequency divided by
8. It provides clk
CANTIM
frequency to the CAN Timer if the CAN controller is enabled.
T clk
CANTIM
=
T
clk
IO
x 8 x (CANTCON [7:0] + 1)
20.7.2 16-bit Timer
This timer starts counting from 0x0000 when the CAN controller is enabled (ENFG bit). When
the timer rolls over from 0xFFFF to 0x0000, an interrupt is generated (OVRTIM).
20.7.3 Time Triggering
Two synchronization modes are implemented for TTC (TTC bit):
– synchronization on Start of Frame (SYNCTTC=0),
– synchronization on End of Frame (SYNCTTC=1).
In TTC mode, a frame is sent once, even if an error occurs.
20.7.4 Stamping Message
The capture of the timer value is done in the MOb which receives or sends the frame. All man-
aged MOb are stamped, the stamping of a received (sent) frame occurs on RxOk (TXOK).
20.8 Error Management
20.8.1 Fault Confinement
The CAN channel may be in one of the three following states:
• Error active (default):
The CAN channel takes part in bus communication and can send an active error frame when
the CAN macro detects an error.
• Error passive:
The CAN channel cannot send an active error frame. It takes part in bus communication, but
when an error is detected, a passive error frame is sent. Also, after a transmission, an error
passive unit will wait before initiating further transmission.
• Bus off:
The CAN channel is not allowed to have any influence on the bus.
For fault confinement, a transmit error counter (TEC) and a receive error counter (REC) are
implemented. BOFF and ERRP bits give the information of the state of the CAN channel. Setting
BOFF to one may generate an interrupt.