5 adch and adcl – adc result data registers – Rainbow Electronics ATmega64M1 User Manual
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8209A–AVR–08/09
ATmega16M1/32M1/64M1
• Bit 6 – ISRCEN: Current Source Enable
Set this bit to source a 100µA current to the AREF pin.
Clear this bit to use AREF pin as Analog Reference pin.
• Bit 5 – AREFEN: Analog Reference pin Enable
Set this bit to connect the internal AREF circuit to the AREF pin.
Clear this bit to disconnect the internal AREF circuit from the AREF pin.
• Bit 4 – Res: Reserved
This bit is reserved and will always read as zero.
• Bit 3:0– ADTS[3:0]: ADC Auto Trigger Source Selection Bits
These bits are only necessary in case the ADC works in auto trigger mode. It means if ADATE
bit in ADCSRA register is set.
In accordance with the
, these 3 bits select the interrupt event which will generate the
trigger of the start of conversion. The start of conversion will be generated by the rising edge of
the selected interrupt flag whether the interrupt is enabled or not. In case of trig on PSCnASY
event, there is no flag. So in this case a conversion will start each time the trig event appears
and the previous conversion is completed..
22.10.5
ADCH and ADCL – ADC Result Data Registers
When an ADC conversion is complete, the conversion results are stored in these two result data
registers.
When the ADCL register is read, the two ADC result data registers can’t be updated until the
ADCH register has also been read.
Table 22-7.
ADC Auto Trigger Source Selection
ADTS[3:0]
Description
0000
Free Running Mode
0001
External Interrupt Request 0
0010
Timer/Counter0 Compare Match
0011
Timer/Counter0 Overflow
0100
Timer/Counter1 Compare Match B
0101
Timer/Counter1 Overflow
0110
Timer/Counter1 Capture Event
0111
PSC Module 0 Synchronization Signal
1000
PSC Module 1 Synchronization Signal
1001
PSC Module 2 Synchronization Signal
1010
Analog comparator 0
1011
Analog comparator 1
1100
Analog comparator 2
1101
Analog comparator 3
1110
Reserved
1111
Reserved