Rainbow Electronics ATmega64M1 - Manual (Page 200)

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8209A–AVR–08/09
ATmega16M1/32M1/64M1
21. LIN / UART - Local Interconnect Network Controller or UART
21.1 Features
21.1.1 LIN
• Hardware Implementation of LIN 2.1 (LIN 1.3 Compatibility)
• Small, CPU Efficient and Independent Master/Slave Routines Based on “LIN Work Flow Concept”
of LIN 2.1 Specification
• Automatic LIN Header Handling and Filtering of Irrelevant LIN Frames
• Automatic LIN Response Handling
• Extended LIN Error Detection and Signaling
• Hardware Frame Time-out Detection
• “Break-in-data” Support Capability
• Automatic Re-synchronization to Ensure Proper Frame Integrity
• Fully Flexible Extended Frames Support Capabilities
21.1.2 UART
• Full Duplex Operation (Independent Serial Receive and Transmit Processes)
• Asynchronous Operation
• High Resolution Baud Rate Generator
• Hardware Support of 8 Data Bits, Odd/Even/No Parity Bit, 1 Stop Bit Frames
• Data Over-Run and Framing Error Detection
21.2 Overview
The LIN (Local Interconnect Network) is a serial communications protocol which efficiently sup-
ports the control of mechatronics nodes in distributed automotive applications. The main
properties of the LIN bus are:
• Single master with multiple slaves concept
• Low cost silicon implementation based on common UART/SCI interface
• Self synchronization in slave node
• Deterministic signal transmission with signal propagation time computable in advance
• Low cost single-wire implementation
• Speed up to 20 Kbit/s.
LIN provides a cost efficient bus communication where the bandwidth and versatility of CAN are
not required. The specification of the line driver/receiver needs to match the ISO9141 NRZ-
standard.
If LIN is not required, the controller alternatively can be programmed as Universal Asynchronous
serial Receiver and Transmitter (UART).