Rainbow Electronics ATmega64M1 - Manual (Page 259)

259
8209A–AVR–08/09
ATmega16M1/32M1/64M1
24.4.2 AC1CON – Analog Comparator 1Control Register
• Bit 7– AC1EN: Analog Comparator 1 Enable Bit
Set this bit to enable the analog comparator 1.
Clear this bit to disable the analog comparator 1.
• Bit 6– AC1IE: Analog Comparator 1 Interrupt Enable bit
Set this bit to enable the analog comparator 1 interrupt.
Clear this bit to disable the analog comparator 1 interrupt.
• Bit 5:4– AC1IS[1:0]: Analog Comparator 1 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
The different setting are shown in
Table 24-1 .
• Bit 3– AC1ICE: Analog Comparator 1 Interrupt Capture Enable bit
Set this bit to enable the input capture of the Timer/Counter1 on the analog comparator event.
The comparator output is in this case directly connected to the input capture front-end logic,
making the comparator utilize the noise canceler and edge select features of the
Timer/Counter1 Input Capture interrupt. To make the comparator trigger the Timer/Counter1
Input Capture interrupt, the ICIE1 bit in the Timer Interrupt Mask Register (TIMSK1) must be set.
Table 24-2. Analog Comparator 0 negative input selection
AC0M[2:0] Description
000 “Vref”/6.40
001 “Vref”/3.20
010 “Vref”/2.13
000 “Vref”/1.60
111 Bandgap (1.1V)
101 DAC result
110 Analog Comparator Negative Input (ACMPM pin)
111 Reserved
Bit 7 6 5 4 3 2 1 0
AC1EN AC1IE AC1IS1 AC1IS0 AC1ICE AC1M2 AC1M1 AC1M0 AC1CON
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 24-3. Interrupt sensitivity selection
AC1IS[1:0] Description
00 Comparator Interrupt on output toggle
01 Reserved
10 Comparator interrupt on output falling edge
11 Comparator interrupt on output rising edge