Comtech EF Data DMD20 - Manual (Page 69)

DMD20/DMD50/DMD2050/DMD2050E/DMD1050/OM20 Remote Protocol Remote Operations
MN-DMDREMOTEOP Revision 9 1–59
<1> Latched Common
Alarm 1
Bit 0 = -12V Alarm
Bit 1 = +12V Alarm
Bit 2 = +5V Alarm
Bits 3 – 5 = Reserved
Bit 6 = IF SYNTH Alarm
Bit 7 = Spare
0 = Not Latched, 1 = Latched
<1> Latched Common
Alarm 2
Bit 0 = TERR FPGA Config
Bit 1 = CODEC FPGA Config
Bit 2 = CODEC Device Config
Bit 3 = TRANSEC Power Test
Bit 4 = +1.5 V Rx Alarm
Bit 5 = +1.5 V TX Alarm
Bit 6 = +3.3 V Alarm
Bit 7 = +20 V Alarm
0 = Not Latched, 1 = Latched
<1> Backward Alarms Bit 0 = Backward Alarm 1 IDR
Bit 1 = Backward Alarm 2 IDR
Bit 2 = Backward Alarm 3 IDR
Bit 3 = Backward Alarm 4 IDR
Bits 4 – 7 = Reserved
0 = No, 1 = Yes
<4> Error Counter Binary value
<4> Test Error Counter Binary value
<2> Raw BER Mantissa Bytes 1 - 2 = Binary value Raw BER; 896 = 8.96
<2> Corrected BER
Mantissa
Bytes 1 - 2 = Binary value corrected BER
<2> EbNo Binary value, 1 decimal point implied; 700 = 7.00
<4> Offset Frequency Binary value, 1 Hz steps
<2> Test BER Mantissa Bytes 1 - 2 = Binary value test BER
<1> Raw BER Exponent Byte 3 = Binary value exponent
<1> Corrected BER
Exponent
Byte 3 = Binary value exponent
<1> Test BER Exponent Byte 3 = Binary value exponent
<1> Offset Frequency
Sign
If <> 0, '-' offset
<1> BER/EbNo Status Bit 0 = Raw BER and corrected BER status. 1 = Valid
Bit 1 = Test BER status. 1 = Valid
Bits 2 - 3 = EbNo status, 0 = EbNo is invalid, 1 = EbNo
is valid, 2 = EbNo is smaller than indicated value, 3 =
EbNo is greater than indicated value
Bit 4 = BER Counter Overflow. 1 = Overflow Condition
Bit 5 = Test BER Counter Overflow. 1 = Overflow
Condition
Bits 6 – 7 = Reserved
<1> Buffer Percent Full Binary value representing % buffer full, 0 - 100 in 1%
steps
<1> Input Level Binary value in 1 dB steps, implied sign
<1> Insert Status Fault Bit 0 = Frame lock fault. 1 = Fail
Bit 1 = Multiframe lock fault. Valid in E1 PCM-30 and
PCM-30C. 1 = Fail
Bit 2 = CRC lock fault. Valid in T1ESF, and E1 CRC
enabled. 1 = Fail
Bits 3 – 7 = Reserved