Maxim Integrated MAXQ Family Users Guide: MAXQ2010 Supplement - Manual (Page 37)

MAXQ Family User’s Guide:
MAXQ2010 Supplement
5-5
Table 5-3. Peripheral Register Bit Reset Values (continued)
REG
BIT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPIB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
EIF1 0 0 0 0 0 0 0 0
EIE1 0 0 0 0 0 0 0 0
EIF2 0 0 0 0 0 0 0 0
EIE2 0 0 0 0 0 0 0 0
PI4 s s s s s s s s
PI5 0 s s s s s s s
PI6 s s s s s s s s
EIES1 0 0 0 0 0 0 0 0
EIES2 0 0 0 0 0 0 0 0
SVM 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0
PD4 0 0 0 0 0 0 0 0
PD5 0 0 0 0 0 0 0 0
PD6 0 0 0 0 0 0 0 0
SPICN 0 0 0 0 0 0 0 0
SPICF 0 0 0 0 0 0 0 0
SPICK 0 0 0 0 0 0 0 0
MCNT 0 0 0 0 0 0 0 0
MA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LCFG 0 0 0 0 0 0 0 0
MC1R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC0R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LCRA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LCD[n] 0 0 0 0 0 0 0 0
I2CBUF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2CST 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2CIE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SCON0 0 0 0 0 0 0 0 0
SBUF0 0 0 0 0 0 0 0 0
SCON1 0 0 0 0 0 0 0 0
SBUF1 0 0 0 0 0 0 0 0
SMD0 0 0 0 0 0 0 0 0
PR0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SMD1 0 0 0 0 0 0 0 0
PR1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2CCN 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2CCK 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0
I2CTO 0 0 0 0 0 0 0 0
I2CSLA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TB0R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0