Intel 253666-024US - Manual (Page 97)

Vol. 2A 3-51
INSTRUCTION SET REFERENCE, A-M
ADDSUBPS—Packed Single-FP Add/Subtract
#XM For an unmasked Streaming SIMD Extensions numeric excep-
tion, CR4.OSXMMEXCPT[bit 10] = 1.
#UD If CR0.EM[bit 2] = 1.
For an unmasked Streaming SIMD Extensions numeric excep-
tion (CR4.OSXMMEXCPT[bit 10] = 0).
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
If the LOCK prefix is used.
Virtual 8086 Mode Exceptions
GP(0) If any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH.
If a memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#NM If CR0.TS[bit 3] = 1.
#XM For an unmasked Streaming SIMD Extensions numeric excep-
tion, CR4.OSXMMEXCPT[bit 10] = 1.
#UD If CR0.EM[bit 2] = 1.
For an unmasked Streaming SIMD Extensions numeric excep-
tion (CR4.OSXMMEXCPT[bit 10] = 0).
If CR4.OSFXSR[bit 9] = 0.
If CPUID.01H:ECX.SSE3[bit 0] = 0.
If the LOCK prefix is used.
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
#SS(0) If a memory address referencing the SS segment is in a non-
canonical form.
#GP(0) If the memory address is in a non-canonical form.
If memory operand is not aligned on a 16-byte boundary,
regardless of segment.
#PF(fault-code) For a page fault.
#NM If CR0.TS[bit 3] = 1.
#XM If an unmasked SIMD floating-point exception and CR4.OSXM-
MEXCPT[bit 10] = 1.