Intel 253666-024US - Manual (Page 686)

3-640 Vol. 2A MOVLPD—Move Low Packed Double-Precision Floating-Point Value
INSTRUCTION SET REFERENCE, A-M
MOVLPD—Move Low Packed Double-Precision Floating-Point Value
Description
Moves a double-precision floating-point value from the source operand (second
operand) to the destination operand (first operand). The source and destination
operands can be an XMM register or a 64-bit memory location. This instruction allows
a double-precision floating-point value to be moved to and from the low quadword of
an XMM register and memory. It cannot be used for register to register or memory to
memory moves. When the destination operand is an XMM register, the high quad-
word of the register remains unchanged.
In 64-bit mode, use of the REX.R prefix permits this instruction to access additional
registers (XMM8-XMM15).
Operation
MOVLPD instruction for memory to XMM move:
DEST[63:0] ← SRC;
(* DEST[127:64] unchanged *)
MOVLPD instruction for XMM to memory move:
DEST ← SRC[63:0];
Intel C/C++ Compiler Intrinsic Equivalent
MOVLPD __m128d _mm_loadl_pd ( __m128d a, double *p)
MOVLPD void _mm_storel_pd (double *p, __m128d a)
SIMD Floating-Point Exceptions
None.
Protected Mode Exceptions
#GP(0) For an illegal memory operand effective address in the CS, DS,
ES, FS or GS segments.
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
66 0F 12 /r MOVLPD xmm,
m64
Valid Valid Move double-precision floating-point
value from m64 to low quadword of xmm
register.
66 0F 13 /r MOVLPD m64,
xmm
Valid Valid Move double-precision floating-point
nvalue from low quadword of xmm
register to m64.