Intel 253666-024US - Manual (Page 416)

3-370 Vol. 2A FRSTOR—Restore x87 FPU State
INSTRUCTION SET REFERENCE, A-M
FRSTOR—Restore x87 FPU State
Description
Loads the FPU state (operating environment and register stack) from the memory
area specified with the source operand. This state data is typically written to the
specified memory location by a previous FSAVE/FNSAVE instruction.
The FPU operating environment consists of the FPU control word, status word, tag
word, instruction pointer, data pointer, and last opcode. Figures 8-9 through 8-12 in
the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1, show
the layout in memory of the stored environment, depending on the operating mode
of the processor (protected or real) and the current operand-size attribute (16-bit or
32-bit). In virtual-8086 mode, the real mode layouts are used. The contents of the
FPU register stack are stored in the 80 bytes immediately following the operating
environment image.
The FRSTOR instruction should be executed in the same operating mode as the
corresponding FSAVE/FNSAVE instruction.
If one or more unmasked exception bits are set in the new FPU status word, a
floating-point exception will be generated. To avoid raising exceptions when loading
a new operating environment, clear all the exception flags in the FPU status word
that is being loaded.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
FPUControlWord ← SRC[FPUControlWord];
FPUStatusWord ← SRC[FPUStatusWord];
FPUTagWord ← SRC[FPUTagWord];
FPUDataPointer ← SRC[FPUDataPointer];
FPUInstructionPointer ← SRC[FPUInstructionPointer];
FPULastInstructionOpcode ← SRC[FPULastInstructionOpcode];
ST(0) ← SRC[ST(0)];
ST(1) ← SRC[ST(1)];
ST(2) ← SRC[ST(2)];
ST(3) ← SRC[ST(3)];
ST(4) ← SRC[ST(4)];
ST(5) ← SRC[ST(5)];
ST(6) ← SRC[ST(6)];
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
DD /4 FRSTOR m94/108byte Valid Valid Load FPU state from
m94byte or m108byte.