Intel 253666-024US - Manual (Page 115)

Vol. 2A 3-69
INSTRUCTION SET REFERENCE, A-M
BSF—Bit Scan Forward
BSF—Bit Scan Forward
Description
Searches the source operand (second operand) for the least significant set bit (1 bit).
If a least significant 1 bit is found, its bit index is stored in the destination operand
(first operand). The source operand can be a register or a memory location; the
destination operand is a register. The bit index is an unsigned offset from bit 0 of the
source operand. If the content of the source operand is 0, the content of the destina-
tion operand is undefined.
In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefix
in the form of REX.R permits access to additional registers (R8-R15). Using a REX
prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at
the beginning of this section for encoding data and limits.
Operation
IF SRC = 0
THEN
ZF ← 1;
DEST is undefined;
ELSE
ZF ← 0;
temp ← 0;
WHILE Bit(SRC, temp) = 0
DO
temp ← temp + 1;
DEST ← temp;
OD;
FI;
Flags Affected
The ZF flag is set to 1 if all the source operand is 0; otherwise, the ZF flag is cleared.
The CF, OF, SF, AF, and PF, flags are undefined.
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
0F BC /r BSF r16, r/m16 Valid Valid Bit scan forward on r/m16.
0F BC /r BSF r32, r/m32 Valid Valid Bit scan forward on r/m32.
REX.W + 0F BC BSF r64, r/m64 Valid N.E. Bit scan forward on r/m64.