Intel 253666-024US - Manual (Page 201)

Vol. 2A 3-155
INSTRUCTION SET REFERENCE, A-M
CMPXCHG8B/CMPXCHG16B—Compare and Exchange Bytes
#SS If a memory operand effective address is outside the SS
segment limit.
Virtual-8086 Mode Exceptions
#UD If the destination operand is not a memory location.
#GP(0) If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
#SS(0) If a memory operand effective address is outside the SS
segment limit.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made.
Compatibility Mode Exceptions
Same exceptions as in protected mode.
64-Bit Mode Exceptions
#SS(0) If a memory address referencing the SS segment is in a non-
canonical form.
#GP(0) If the memory address is in a non-canonical form.
If memory operand for CMPXCHG16B is not aligned on a 16-byte
boundary.
IfIf CPUID.01H:ECX.CMPXCHG16B[bit 13] = 0.
#UD If the destination operand is not a memory location.
#PF(fault-code) If a page fault occurs.
#AC(0) If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.