Intel 253666-024US - Manual (Page 739)

Vol. 2A 3-693
INSTRUCTION SET REFERENCE, A-M
MOVZX—Move with Zero-Extend
MOVZX—Move with Zero-Extend
Description
Copies the contents of the source operand (register or memory location) to the desti-
nation operand (register) and zero extends the value. The size of the converted value
depends on the operand-size attribute.
In 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R
prefix permits access to additional registers (R8-R15). Use of the REX.W prefix
promotes operation to 64 bit operands. See the summary chart at the beginning of
this section for encoding data and limits.
Operation
DEST ← ZeroExtend(SRC);
Flags Affected
None.
Protected Mode Exceptions
#GP(0) If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register contains a NULL segment
selector.
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
0F B6 /r MOVZX r16, r/m8 Valid Valid Move byte to word with zero-
extension.
0F B6 /r MOVZX r32, r/m8 Valid Valid Move byte to doubleword,
zero-extension.
REX.W + 0F B6 /r MOVZX r64, r/m8* Valid N.E. Move byte to quadword, zero-
extension.
0F B7 /r MOVZX r32, r/m16 Valid Valid Move word to doubleword,
zero-extension.
REX.W + 0F B7 /r MOVZX r64, r/m16 Valid N.E. Move word to quadword, zero-
extension.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if the REX prefix
is used: AH, BH, CH, DH.