Intel 253666-024US - Manual (Page 43)

Vol. 2A 2-13
INSTRUCTION FORMAT
2.2.1.3 Displacement
Addressing in 64-bit mode uses existing 32-bit ModR/M and SIB encodings. The
ModR/M and SIB displacement sizes do not change. They remain 8 bits or 32 bits and
are sign-extended to 64 bits.
2.2.1.4 Direct Memory-Offset MOVs
In 64-bit mode, direct memory-offset forms of the MOV instruction are extended to
specify a 64-bit immediate absolute address. This address is called a moffset. No
prefix is needed to specify this 64-bit memory offset. For these MOV instructions, the
Table 2-5. Special Cases of REX Encodings
ModR/M or
SIB
Sub-field
Encodings
Compatibility
Mode Operation
Compatibility
Mode Implications Additional Implications
ModR/M Byte mod != 11 SIB byte present. SIB byte required
for ESP-based
addressing.
REX prefix adds a fourth
bit (b) which is not
decoded (don't care).
SIB byte also required for
R12-based addressing.
r/m ==
b*100(ESP)
ModR/M Byte mod == 0 Base register not
used.
EBP without a
displacement must
be done using
mod = 01 with
displacement of 0.
REX prefix adds a fourth
bit (b) which is not
decoded (don't care).
Using RBP or R13 without
displacement must be
done using mod = 01 with
a displacement of 0.
r/m ==
b*101(EBP)
SIB Byte index ==
0100(ESP)
Index register not
used.
ESP cannot be used
as an index
register.
REX prefix adds a fourth
bit (b) which is decoded.
There are no additional
implications. The
expanded index field
allows distinguishing RSP
from R12, therefore R12
can be used as an index.
SIB Byte base ==
0101(EBP)
Base register is
unused if
mod = 0.
Base register
depends on mod
encoding.
REX prefix adds a fourth
bit (b) which is not
decoded.
This requires explicit
displacement to be used
with EBP/RBP or R13.
NOTES:
* Don’t care about value of REX.B