Intel 253666-024US User Manual
Page 225

Vol. 2A 3-179
INSTRUCTION SET REFERENCE, A-M
CPUID—CPU Identification
56H
Data TLB0: 4 MByte pages, 4-way set associative, 16 entries
57H
Data TLB0: 4 KByte pages, 4-way associative, 16 entries
5BH
Data TLB: 4 KByte and 4 MByte pages, 64 entries
5CH
Data TLB: 4 KByte and 4 MByte pages,128 entries
5DH
Data TLB: 4 KByte and 4 MByte pages,256 entries
60H
1st-level data cache: 16 KByte, 8-way set associative, 64 byte line size
66H
1st-level data cache: 8 KByte, 4-way set associative, 64 byte line size
67H
1st-level data cache: 16 KByte, 4-way set associative, 64 byte line size
68H
1st-level data cache: 32 KByte, 4-way set associative, 64 byte line size
70H
Trace cache: 12 K-μop, 8-way set associative
71H
Trace cache: 16 K-μop, 8-way set associative
72H
Trace cache: 32 K-μop, 8-way set associative
78H
2nd-level cache: 1 MByte, 4-way set associative, 64byte line size
79H
2nd-level cache: 128 KByte, 8-way set associative, 64 byte line size, 2 lines
per sector
7AH
2nd-level cache: 256 KByte, 8-way set associative, 64 byte line size, 2 lines
per sector
7BH
2nd-level cache: 512 KByte, 8-way set associative, 64 byte line size, 2 lines
per sector
7CH
2nd-level cache: 1 MByte, 8-way set associative, 64 byte line size, 2 lines per
sector
7DH
2nd-level cache: 2 MByte, 8-way set associative, 64byte line size
7FH
2nd-level cache: 512 KByte, 2-way set associative, 64-byte line size
82H
2nd-level cache: 256 KByte, 8-way set associative, 32 byte line size
83H
2nd-level cache: 512 KByte, 8-way set associative, 32 byte line size
84H
2nd-level cache: 1 MByte, 8-way set associative, 32 byte line size
85H
2nd-level cache: 2 MByte, 8-way set associative, 32 byte line size
86H
2nd-level cache: 512 KByte, 4-way set associative, 64 byte line size
87H
2nd-level cache: 1 MByte, 8-way set associative, 64 byte line size
B0H
Instruction TLB: 4 KByte pages, 4-way set associative, 128 entries
B3H
Data TLB: 4 KByte pages, 4-way set associative, 128 entries
B4H
Data TLB1: 4 KByte pages, 4-way associative, 256 entries
F0H
64-Byte prefetching
F1H
128-Byte prefetching
Table 3-17. Encoding of Cache and TLB Descriptors (Contd.)
Descriptor Value
Cache or TLB Description