Intel 253666-024US - Manual (Page 351)

Vol. 2A 3-305
INSTRUCTION SET REFERENCE, A-M
FCMOVcc—Floating-Point Conditional Move
FCOM/FCOMP/FCOMPP—Compare Floating Point Values
Description
Compares the contents of register ST(0) and source value and sets condition code
flags C0, C2, and C3 in the FPU status word according to the results (see the table
below). The source operand can be a data register or a memory location. If no source
operand is given, the value in ST(0) is compared with the value in ST(1). The sign of
zero is ignored, so that –0.0 is equal to +0.0.
This instruction checks the class of the numbers being compared (see “FXAM—Exam-
ineModR/M” in this chapter). If either operand is a NaN or is in an unsupported
format, an invalid-arithmetic-operand exception (#IA) is raised and, if the exception
is masked, the condition flags are set to “unordered.” If the invalid-arithmetic-
operand exception is unmasked, the condition code flags are not set.
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
D8 /2 FCOM m32fp Valid Valid Compare ST(0) with m32fp.
DC /2 FCOM m64fp Valid Valid Compare ST(0) with m64fp.
D8 D0+i FCOM ST(i) Valid Valid Compare ST(0) with ST(i).
D8 D1 FCOM Valid Valid Compare ST(0) with ST(1).
D8 /3 FCOMP m32fp Valid Valid Compare ST(0) with m32fp and
pop register stack.
DC /3 FCOMP m64fp Valid Valid Compare ST(0) with m64fp and
pop register stack.
D8 D8+i FCOMP ST(i) Valid Valid Compare ST(0) with ST(i) and pop
register stack.
D8 D9 FCOMP Valid Valid Compare ST(0) with ST(1) and pop
register stack.
DE D9 FCOMPP Valid Valid Compare ST(0) with ST(1) and pop
register stack twice.
Table 3-26. FCOM/FCOMP/FCOMPP Results
Condition C3 C2 C0
ST(0) > SRC 0 0 0
ST(0) < SRC 0 0 1
ST(0) = SRC 1 0 0
Unordered* 1 1 1
NOTES:
* Flags not set if unmasked invalid-arithmetic-operand (#IA) exception is generated.