Intel 253666-024US - Manual (Page 345)

Vol. 2A 3-299
INSTRUCTION SET REFERENCE, A-M
FCHS—Change Sign
FCHS—Change Sign
Description
Complements the sign bit of ST(0). This operation changes a positive value into a
negative value of equal magnitude or vice versa. The following table shows the
results obtained when changing the sign of various classes of numbers.
This instruction’s operation is the same in non-64-bit modes and 64-bit mode.
Operation
SignBit(ST(0)) ← NOT (SignBit(ST(0)));
FPU Flags Affected
C1 Set to 0 if stack underflow occurred; otherwise, set to 0.
C0, C2, C3 Undefined.
Floating-Point Exceptions
#IS Stack underflow occurred.
Protected Mode Exceptions
#NM CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#UD If the LOCK prefix is used.
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
D9 E0 FCHS Valid Valid Complements sign of ST(0).
Table 3-25. FCHS Results
ST(0) SRC ST(0) DEST
− ∞ + ∞
−F +F
−0 +0
+0 − 0
+F − F
+ ∞ − ∞
NaN NaN
NOTES:
* F means finite floating-point value.