Intel 253666-024US - Manual (Page 41)

Vol. 2A 2-11
INSTRUCTION FORMAT
Table 2-4. REX Prefix Fields [BITS: 0100WRXB]
Field Name Bit Position Definition
- 7:4 0100
W 3 0 = Operand size determined by CS.D
1 = 64 Bit Operand Size
R 2 Extension of the ModR/M reg field
X 1 Extension of the SIB index field
B 0 Extension of the ModR/M r/m field, SIB base field, or
Opcode reg field
Figure 2-4. Memory Addressing Without an SIB Byte; REX.X Not Used
Figure 2-5. Register-Register Addressing (No Memory Operand); REX.X Not Used
5(;35(),;
:5%
2SFRGH PRG
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UHJ UP
5UUU %EEE
0RG50%\WH
UUU EEE
20;ILJ
5(;35(),;
:5%
2SFRGH PRG UHJ UP
5UUU %EEE
0RG50%\WH
UUU EEE
20;ILJ