Intel 253666-024US - Manual (Page 56)

3-10 Vol. 2A
INSTRUCTION SET REFERENCE, A-M
zero (00H); if it is greater than 65535, it is represented by the saturated value
65535 (FFFFH).
• LowOrderWord(DEST * SRC) — Multiplies a word operand by a word operand
and stores the least significant word of the doubleword result in the destination
operand.
• HighOrderWord(DEST * SRC) — Multiplies a word operand by a word operand
and stores the most significant word of the doubleword result in the destination
operand.
• Push(value) — Pushes a value onto the stack. The number of bytes pushed is
determined by the operand-size attribute of the instruction. See the “Operation”
subsection of the “PUSH—Push Word, Doubleword or Quadword Onto the Stack”
section in Chapter 4 of the Intel® 64 and IA-32 Architectures Software
Developer’s Manual, Volume 2B.
• Pop() removes the value from the top of the stack and returns it. The statement
EAX ← Pop(); assigns to EAX the 32-bit value from the top of the stack. Pop will
return either a word, a doubleword or a quadword depending on the operand-size
attribute. See the “Operation” subsection in the “POP—Pop a Value from the
Stack” section of Chapter 4 of the Intel® 64 and IA-32 Architectures Software
Developer’s Manual, Volume 2B.
• PopRegisterStack — Marks the FPU ST(0) register as empty and increments
the FPU register stack pointer (TOP) by 1.
• Switch-Tasks — Performs a task switch.
• Bit(BitBase, BitOffset) — Returns the value of a bit within a bit string. The bit
string is a sequence of bits in memory or a register. Bits are numbered from low-
order to high-order within registers and within memory bytes. If the BitBase is a
register, the BitOffset can be in the range 0 to [15, 31, 63] depending on the
mode and register size. See Figure 3-1: the function Bit[RAX, 21] is illustrated.
If BitBase is a memory address, the BitOffset can range has different ranges
depending on the operand size (see Table 3-2).
Figure 3-1. Bit Offset for BIT[RAX, 21]
0 21 31
Bit Offset ← 21
63