beautypg.com

Intel 253666-024US User Manual

Page 520

background image

3-474 Vol. 2A

INT n/INTO/INT 3—Call to Interrupt Procedure

INSTRUCTION SET REFERENCE, A-M

CS ← IDT(Descriptor (vector_number ∗ 4), selector));

EIP ← IDT(Descriptor (vector_number ∗ 4), offset)); (* 16 bit offset AND 0000FFFFH *)

END;
PROTECTED-MODE:

IF ((vector_number ∗ 8) + 7) is not within IDT limits

or selected IDT descriptor is not an interrupt-, trap-, or task-gate type

THEN #GP((vector_number ∗ 8) + 2 + EXT); FI;

(* EXT is bit 0 in error code *)

IF software interrupt (* Generated by INT n, INT 3, or INTO *)

THEN

IF gate descriptor DPL < CPL

THEN #GP((vector_number ∗ 8) + 2 ); FI;

(* PE

=

1, DPL

FI;
IF gate not present

THEN #NP((vector_number ∗ 8) + 2 + EXT); FI;

IF task gate (* Specified in the selected interrupt table descriptor *)

THEN GOTO TASK-GATE;
ELSE GOTO TRAP-OR-INTERRUPT-GATE; (* PE = 1, trap/interrupt gate *)

FI;

END;
IA-32e-MODE:

IF ((vector_number ∗ 16) + 15) is not in IDT limits

or selected IDT descriptor is not an interrupt-, or trap-gate type

THEN #GP((vector_number ∗ 16) + 2 + EXT); FI;

(* EXT is bit 0 in error code *)

IF software interrupt (* Generated by INT n, INT 3, but not INTO *)

THEN

IF gate descriptor DPL < CPL

THEN #GP((vector_number ∗ 16) + 2 ); FI;

(* PE

=

1, DPL < CPL, software interrupt *)

ELSE (* Generated by INTO *)

THEN #UD;

FI;
IF gate not present

THEN #NP((vector_number ∗ 16) + 2 + EXT); FI;

IF ((vector_number * 16)[IST]

0)

NewRSP ← TSS[ISTx]; FI;

GOTO TRAP-OR-INTERRUPT-GATE; (* Trap/interrupt gate *)

END;
TASK-GATE: (* PE

=

1, task gate *)

Read segment selector in task gate (IDT descriptor);

IF local/global bit is set to local