Intel 253666-024US User Manual
Page 368
3-322 Vol. 2A
FDIVR/FDIVRP/FIDIVR—Reverse Divide
INSTRUCTION SET REFERENCE, A-M
DEST ← SRC / DEST;
FI;
FI;
IF Instruction
=
FDIVRP
THEN
PopRegisterStack;
FI;
FPU Flags Affected
C1
Set to 0 if stack underflow occurred.
Set if result was rounded up; cleared otherwise.
C0, C2, C3
Undefined.
Floating-Point Exceptions
#IS
Stack underflow occurred.
#IA
Operand is an SNaN value or unsupported format.
±∞ / ±∞; ±0 / ±0
#D
Source is a denormal value.
#Z
SRC / ±0, where SRC is not equal to ±0.
#U
Result is too small for destination format.
#O
Result is too large for destination format.
#P
Value cannot be represented exactly in destination format.
Protected Mode Exceptions
#GP(0)
If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.
If the DS, ES, FS, or GS register contains a NULL segment
selector.
#SS(0)
If a memory operand effective address is outside the SS
segment limit.
#NM
CR0.EM[bit 2] or CR0.TS[bit 3] = 1.
#PF(fault-code)
If a page fault occurs.
#AC(0)
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
#UD
If the LOCK prefix is used.
Real-Address Mode Exceptions
#GP
If a memory operand effective address is outside the CS, DS,
ES, FS, or GS segment limit.