Intel 253666-024US - Manual (Page 307)

Vol. 2A 3-261
INSTRUCTION SET REFERENCE, A-M
DEC—Decrement by 1
DEC—Decrement by 1
Description
Subtracts 1 from the destination operand, while preserving the state of the CF flag.
The destination operand can be a register or a memory location. This instruction
allows a loop counter to be updated without disturbing the CF flag. (To perform a
decrement operation that updates the CF flag, use a SUB instruction with an imme-
diate operand of 1.)
This instruction can be used with a LOCK prefix to allow the instruction to be
executed atomically.
In 64-bit mode, DEC r16 and DEC r32 are not encodable (because opcodes 48H
through 4FH are REX prefixes). Otherwise, the instruction’s 64-bit mode default
operation size is 32 bits. Use of the REX.R prefix permits access to additional regis-
ters (R8-R15). Use of the REX.W prefix promotes operation to 64 bits.
See the summary chart at the beginning of this section for encoding data and limits.
Operation
DEST ← DEST – 1;
Flags Affected
The CF flag is not affected. The OF, SF, ZF, AF, and PF flags are set according to the
result.
Opcode Instruction 64-Bit
Mode
Compat/
Leg Mode
Description
FE /1 DEC r/m8 Valid Valid Decrement r/m8 by 1.
REX + FE /1 DEC r/m8 * Valid N.E. Decrement r/m8 by 1.
FF /1 DEC r/m16 Valid Valid Decrement r/m16 by 1.
FF /1 DEC r/m32 Valid Valid Decrement r/m32 by 1.
REX.W + FF /1 DEC r/m64 Valid N.E. Decrement r/m64 by 1.
48+rw DEC r16 N.E. Valid Decrement r16 by 1.
48+rd DEC r32 N.E. Valid Decrement r32 by 1.
NOTES:
* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is
used: AH, BH, CH, DH.