9 pci express port, Figure 4-4, Pci express bus topology – Artesyn CPCI-6200 Installation and Use (May 2015) User Manual
Page 91: Functional description
Functional Description
CPCI-6200 Installation and Use (6806800J66E)
91
4.9
PCI Express Port
The processor is configured for two x4-lane PCI Express ports. PCIe 1 is connected to a six-port
PEX8624 PCI Express switch. PCIe 2 is connected to a PCI Express expansion connector. Port 0
of PEX8624 is configured as an upstream port while the rest is configured as downstream
ports. Each downstream port is connected to a PCI/PCI-X bridge. Each PCI Express lane is
capable of supporting a data rate of 2.5 Gb/s.
Figure 4-4
PCI Express Bus Topology
Dual Core 8572
Processor
PCIe 1
X4, Lane[0-3]
X4, Lane[36-39] (used as X1 only)
PCIe 2
PCIe Expansion
x4
E2P
Tsi384
E2P
Tsi384
E2P
Tsi384
PCIe
Switch
PEX8624
E2P
Tsi381
PCI-X
PCI-X
PCI
PCI
STN 0, Port 0
PCIE0[3:0]
STN 1, Port 5
PCIE1[3:0]
STN 1, Port 6
PCIE2[3:0]
STN 2, Port 8
PCIE3[3:0]
STN 2, Port 9
PCIE4[0]
PCIE5[3:0]
PMC 1
PMC 2
PCI
Bridge
USB
Bus 1
Bus 2
Bus 3
Bus 4
X4, Lane[24-27]
X4, Lane[28-31]
X4, Lane[32-35]
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