13 ipmi debug and fw programming header, p3, 14 processor debug header, p4, Table 3-13 – Artesyn CPCI-6200 Installation and Use (May 2015) User Manual
Page 76: Ipmi debug pinout, p3, Table 3-14, Processor debug header pinout, p4, Controls, leds, and connectors
Controls, LEDs, and Connectors
CPCI-6200 Installation and Use (6806800J66E)
76
3.3.13 IPMI Debug and FW Programming Header, P3
The CPCI-6200 provides one 4-pin planar header connected to IPMI serial port 2 for debugging
and programming IPMI firmware.
3.3.14 Processor Debug Header, P4
The CPCI-6200 has a 10-pin header for debugging. This header can debug a DDR or LBC
interface.
Table 3-13 IPMI Debug Pinout, P3
Pin Number
Signal
1
TXD
2
GND
3
RXD
4
GND
Table 3-14 Processor Debug Header Pinout, P4
Pin Number
Signal
Signal
Pin Number
1
GND
MCRCID_0
2
3
TRIG_IN
MCRCID_1
4
5
TRIG_OUT
MCRCID_2
6
7
MDVAL
MCRCID_3
8
9
3.3V
MCRCID_4
10
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