Artesyn CPCI-6200 Installation and Use (May 2015) - Manual (Page 127)

Transition Module Preparation and Installation
CPCI-6200 Installation and Use (6806800J66E) 127
Due to pin limitations of the J5 connector, the CPCI-6200 SBC multiplexes the serial channel
control signals between the CPCI-6200 SBC and the CPCI-6115-MCPTM. This hardware
function is transparent to software. The block diagram for the signal multiplexing on the
transition module is shown in the following figure:
5.7.6.1 I/O Signal Multiplexing (IOMX)
The CPCI-6115-MCPTM uses a PLD to generate the IOMUX function. The CPCI-6200 SBC uses
a similar device. There are four pins that are used for the IOMX function: MXCLK, MXSYNC#,
MXDO and MXDI. MXCLK is the 10 MHz bit clock for the time-multiplexed data lines MXDO and
MXDI. MXSYNC# is asserted for one bit time at Time Slot 15 by the CPCI-6200 SBC. MXSYNC#
is used by the CPCI-6115-MCPTM to synchronize with the CPCI-6200 SBC. MXDO is the time-
multiplexed output line from the CPCI-6200 and MXDI is the time-multiplexed line from the
Figure 5-5 Signal Multiplexing Diagram