16 nand flash chip 2 status register, Table 8-35, Nand flash chip 2 status register, 0xf200_0017 – Artesyn CPCI-6200 Installation and Use (May 2015) User Manual
Page 208: Table 8-36, Nand flash chip 2 status register field definition
Memory Maps and Addresses
CPCI-6200 Installation and Use (6806800J66E)
208
8.4.16 NAND Flash Chip 2 Status Register
1
Chip 2 is installed on the board.
0
Chip 2 is not installed on the board.
RSVD
Reserved
Table 8-34 NAND Flash Chip 2 Presence Register Field Definition (continued)
Table 8-35 NAND Flash Chip 2 Status Register, 0xF200_0017
Bit
Field
Operation
Reset
7
RB1
R
1
6
RB2
R
1
5
RB3
R
1
4
RB4
R
1
3
RSVD
R
0
2
RSVD
R
0
1
RSVD
R
0
0
RSVD
R
0
Table 8-36 NAND Flash Chip 2 Status Register Field Definition
RB1
Ready/Busy 1
1
Device 1 is ready.
0
Device 1 is busy.
RB2
Ready/Busy 2
1
Device 2 is ready.
0
Device 2 is busy.
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