Artesyn CPCI-6200 Installation and Use (May 2015) - Manual (Page 104)

Functional Description
CPCI-6200 Installation and Use (6806800J66E) 104
The controller operates at 32 MHz clock frequency derived from 7.37 MHz external oscillator.
An external SRAM is also added to increase the size of total SRAM available to IPMI firmware.
IPMI firmware resides in internal flash memory. A serial port and I
2
C bus is connected between
IPMI controller and processor for inter-communication.
You can set the IPMI controller to function as a baseboard management controller (BMC) or a
peripheral management (PM) controller. The mode can be selected by a switch provided on the
board. For more information on setting the IPMI controller, see
IPMI Configuration Switch, S2 on
page 50 .
Various board signals are connected to the controller for managing and maintaining system
event log functions.
4.18.1 Programming the IPMI Firmware
The CPCI-6200 provides a 4-pin planar header (P3) for programming IPMI firmware.
The IPMI firmware is programmed at the factory before the board is shipped. This section is
included to explain how the firmware can be upgraded in the field if needed.
1. Set the switch S2 positions 2 and 3 to ON.
The IPMI controller enters programming mode. For more information, see IPMI
Configuration Switch, S2 on page 50 .
2. Connect custom-made RS-232 cable to the computer and 4-pin planar header.
For more information, see IPMI Debug and FW Programming Header, P3 on page 76 .
For information on custom RS-232 cable, contact Artesyn.
3. Download the firmware from the computer to the IPMI controller.